Both thin and conformal silicon-based dielectric films are used in numerous integrated circuit applications, including spacer applications, liner applications, and double patterning applications. Current plasma enhanced chemical vapor deposition (PECVD) methods for depositing these films using silane-based precursors often have deposition rates in excess of 120 nm/min. Such a deposition rate requires very short deposition times on the order of 1 second to achieve a thin film of nominal thickness 5 nm. Short deposition times can render reproducibility, both wafer-to-wafer and tool-to-tool, more challenging. Additionally, step coverage for conventionally deposited silane-based oxides is poor.